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1. product pro?le 1.1 general description n-channel enhancement mode field-effect transistor (fet) in a plastic package using trenchmos? technology. 1.2 features 1.3 applications 1.4 quick reference data 2. pinning information PH7030L n-channel trenchmos? logic level fet rev. 04. 7 march 2005 product data sheet n low thermal resistance n s08 equivalent area footprint n logic level gate drive n low on-state resistance. n dc-to-dc converters n switched-mode power supplies n portable appliances n notebook computers. n v ds 30 v n i d 68 a n r dson 7.9 m w n p tot 62.5 w. table 1: pinning pin description simpli?ed outline symbol 1, 2, 3 source sot669 (lfpak) 4 gate mb mounting base; connected to drain mb 1234 s d g mbb076
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 2 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet 3. ordering information 4. limiting values table 2: ordering information type number package name description version PH7030L lfpak plastic single-ended surface mounted package; 4 leads sot669 table 3: limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v ds drain-source voltage (dc) 25 c t j 150 c - 30 v v gs gate-source voltage (dc) - 20 v i d drain current (dc) t mb =25 c; v gs =10v; figure 2 and 3 -68a t mb = 100 c; v gs =10v; figure 2 -43a i dm peak drain current t mb =25 c; pulsed; t p 10 m s; figure 3 - 220 a p tot total power dissipation t mb =25 c; figure 1 - 62.5 w t stg storage temperature - 55 +150 c t j junction temperature - 55 +150 c source-drain diode i s source (diode forward) current (dc) t mb =25 c - 52 a i sm peak source (diode forward) current t mb =25 c; pulsed; t p 10 m s - 150 a avalanche ruggedness e ds(al)s non-repetitive drain-source avalanche energy unclamped inductive load; i d = 33.9 a; t p = 0.15 ms; v dd 30 v; v gs =10v; starting at t j =25 c - 115 mj
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 3 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet v gs 3 10 v fig 1. normalized total power dissipation as a function of mounting base temperature fig 2. normalized continuous drain current as a function of mounting base temperature t mb =25 c; i dm is single pulse; v gs =10v fig 3. safe operating area; continuous and peak drain currents as a function of drain-source voltage 03aa15 0 40 80 120 0 50 100 150 200 t mb p der (%) ( c) 03aa23 0 40 80 120 0 50 100 150 200 (%) i der t mb ( c) p der p tot p tot 25 c () ------------------------ 100 % = i der i d i d25 c () -------------------- - 100 % = 003aaa385 10 -1 1 10 10 2 10 3 10 -1 1 10 10 2 v ds (v) i d (a) dc 100 ms 10 ms limit r dson = v ds / i d 1 ms t p = 10 m s 100 m s
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 4 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet 5. thermal characteristics table 4: thermal characteristics symbol parameter conditions min typ max unit r th(j-mb) thermal resistance from junction to mounting base figure 4 --2k/w fig 4. transient thermal impedance from junction to mounting base as a function of pulse duration 003aaa386 10 -2 10 -1 1 10 10 -5 10 -4 10 -3 10 -2 10 -1 1 t p (s) z th(j-mb) (k/w) single pulse 0.2 0.1 0.05 0.02 t p t p t t p t d = d = 0.5
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 5 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet 6. characteristics table 5: characteristics t j =25 c unless otherwise speci?ed. symbol parameter conditions min typ max unit static characteristics v (br)dss drain-source breakdown voltage i d = 250 m a; v gs =0v 30--v v gs(th) gate-source threshold voltage i d = 1 ma; v ds =v gs ; figure 9 t j =25 c 1 1.5 2 v t j = 150 c 0.6 - - v i dss drain-source leakage current v ds =30v; v gs =0v t j =25 c - 0.06 1 m a t j = 150 c - - 500 m a i gss gate-source leakage current v gs = 15 v; v ds = 0 v - 20 100 na r dson drain-source on-state resistance v gs = 10 v; i d =10a; figure 7 and 8 t j =25 c - 6.9 7.9 m w t j = 150 c - 11.7 13.2 m w v gs = 4.5 v; i d = 10 a; - 9.6 11 m w v gs =5v; i d = 10 a; - 8.7 10 m w dynamic characteristics q g(tot) total gate charge i d = 20 a; v ds =10v; v gs =5v; figure 13 -12-nc q gs gate-source charge - 4.1 - nc q gd gate-drain (miller) charge - 3.2 - nc c iss input capacitance v gs =0v; v ds = 10 v; f = 1 mhz; figure 11 -1362-pf c oss output capacitance - 544 - pf c rss reverse transfer capacitance - 260 - pf t d(on) turn-on delay time v dd =10v; i d =10a; v gs = 4.5 v; r g = 4.7 w -24-ns t r rise time -38-ns t d(off) turn-off delay time - 34 - ns t f fall time -21-ns source-drain diode v sd source-drain (diode forward) voltage i s = 10 a; v gs =0v; figure 12 - 0.81 1.2 v t rr reverse recovery time i s = 20 a; di s /dt = - 100 a/ m s; v gs =0v;v r =20v -11-ns
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 6 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet t j =25 ct j =25 c and 150 c; v ds >i d r dson fig 5. output characteristics: drain current as a function of drain-source voltage; typical values fig 6. transfer characteristics: drain current as a function of gate-source voltage; typical values t j =25 c fig 7. drain-source on-state resistance as a function of drain current; typical values fig 8. normalized drain-source on-state resistance factor as a function of junction temperature 003aaa387 0 10 20 30 40 50 0 0.5 1 1.5 2 v ds (v) i d (a) 4 2.8 2.5 3 3.6 3.2 v gs (v) = 3.4 10 003aaa388 0 5 10 15 20 1234 v gs (v) i d (a) t j = 150 c 25 c 003aaa389 0 10 20 30 40 0 5 10 15 20 i d (a) r dson (m w ) 2.9 v v gs (v) = 2.7 v 3 v 5 v 3.4 v 2.8 v 10 v 4 v 03aa27 0 0.5 1 1.5 2 -60 0 60 120 180 t j ( c) a a r dson r dson 25 c () ------------------------------ =
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 7 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet i d = 1 ma; v ds =v gs t j =25 c; v ds =5v fig 9. gate-source threshold voltage as a function of junction temperature fig 10. sub-threshold drain current as a function of gate-source voltage v gs = 0 v; f = 1 mhz fig 11. input, output and reverse transfer capacitances as a function of drain-source voltage; typical values 03aa33 0 0.5 1 1.5 2 2.5 -60 0 60 120 180 t j ( c) v gs(th) (v) max typ min 03aa36 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 0123 v gs (v) i d (a) max typ min 003aaa390 10 2 10 3 10 4 10 -1 1 10 10 2 v ds (v) c (pf) c iss c oss c rss
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 8 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet t j =25 c and 150 c; v gs =0v i d =20a;v dd =10v fig 12. source (diode forward) current as a function of source-drain (diode forward) voltage; typical values fig 13. gate-source voltage as a function of gate charge; typical values 003aaa391 0 5 10 15 20 0.2 0.4 0.6 0.8 1 v sd (v) i s (a) t j = 25 c 150 c 003aaa392 0 2 4 6 8 10 0 5 10 15 20 25 q g (nc) v gs (v)
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 9 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet 7. package outline fig 14. package outline sot669 (lfpak) references outline version european projection issue date iec jedec jeita sot669 mo-235 03-09-15 04-10-13 0 2.5 5 mm scale e e 1 b c 2 a 2 a 2 bc a e unit dimensions (mm are the original dimensions) mm 1.10 0.95 a 3 a 1 0.15 0.00 1.20 1.01 0.50 0.35 b 2 4.41 3.62 b 3 2.2 2.0 b 4 0.9 0.7 0.25 0.19 c 2 0.30 0.24 4.10 3.80 6.2 5.8 h 1.3 0.8 l 2 0.85 0.40 l 1.3 0.8 l 1 8 0 wy d (1) 5.0 4.8 e (1) 3.3 3.1 e 1 (1) d 1 (1) max 0.25 4.20 1.27 0.25 0.1 1 234 mounting base d 1 c plastic single-ended surface mounted package (lfpak); 4 leads sot669 e b 2 b 3 b 4 h d l 2 l 1 a a w m c c x 1/2 e yc q q (a ) 3 l a a 1 detail x note 1. plastic or metal protrusions of 0.15 mm maximum per side are not included.
9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 10 of 12 philips semiconductors PH7030L n-channel trenchmos? logic level fet 8. revision history table 6: revision history document id release date data sheet status change notice doc. number supersedes PH7030L_4 20050307 product data sheet - 9397 750 14206 PH7030L-03 modi?cations: ? the format of this data sheet has been redesigned to comply with the new presentation and information standard of philips semiconductors. ? t ab le 5 char acter istics : r dson data added. PH7030L-03 20040304 product data 9397 750 12944 PH7030L-02 modi?cations: ? t ab le 5 char acter istics , t r data revised. PH7030L-02 20030918 product data 9397 750 11946 PH7030L-01 modi?cations: ? section 3 order ing inf or mation added. ? section 1.4 quic k ref erence data and t ab le 3 limiting v alues , i d data revised. ? section 1.4 quic k ref erence data and t ab le 5 char acter istics , r dson data revised. ? section 4 limiting v alues , v gs data revised. ? t ab le 5 char acter istics , q g(tot) , q gs , q gd , and v sd data revised. ? figure 3 , 4 , 7 , 8 and 13 updated. PH7030L-01 20030502 product data - 9397 750 11405 -
philips semiconductors PH7030L n-channel trenchmos? logic level fet 9397 750 14206 ? koninklijke philips electronics n.v. 2005. all rights reserved. product data sheet rev. 04 7 march 2005 11 of 12 9. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 11. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 12. trademarks trenchmos is a trademark of koninklijke philips electronics n.v. 13. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2005 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 7 march 2005 document number: 9397 750 14206 published in the netherlands philips semiconductors PH7030L n-channel trenchmos? logic level fet 14. contents 1 product pro?le . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.1 general description. . . . . . . . . . . . . . . . . . . . . . 1 1.2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.4 quick reference data. . . . . . . . . . . . . . . . . . . . . 1 2 pinning information . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 thermal characteristics. . . . . . . . . . . . . . . . . . . 4 6 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 9 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 10 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 11 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 12 trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 13 contact information . . . . . . . . . . . . . . . . . . . . 11

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